Professional Development Course on VLSI - High Performance FPGA design and debugging techniques (Full-time)

Course Duration: 16 Weeks

Course Structure and Outline

Mod.

Module Title

What You Learn

P1

Orientation

• Linux operating system - file system and commands
• Python Scripting

C1

Advanced Digital System Design

• Number Systems
• Logic Gates
• Boolean Expressions
• Combinational Circuits
• Introduction to Registers and Counters
• Synchronous Finite State Machine Design
• Data-path elements - Arithmetic Structures
• Introduction to Programmable Platforms
• Design Capture and Simulation
• Practical Digital System Design Examples

C2

Verilog

• Hardware Modeling Overview
• Verilog language concepts
• Modules and Ports
• Operators, Dataflow Modeling
• Introduction to Test benches
• Procedural Statements
• Coding for Finite State Machines
• Coding For Synthesis
• Tasks and Functions
• Advanced Verilog Test benches

C3

FPGA Design and Debugging

• FPGA Architecture - Basic Components of FPGA (LUT, CLB, Switch Matrix, IOB), FPGA Architecture of different families: 7-series and UltraScale devices, Zynq
• FPGA Design Flow - Xilinx Vivado tool Flow, Reading Reports, Implementing IP cores, Debugging Using Vivado Analyzer
• Optimal FPGA Design - HDL Coding Techniques for FPGA, FPGA Design Techniques, Synthesis Techniques, Implementation Options
• Static Timing Analysis - Global Timing Constraints, Path specific timing constraints, Achieving Timing Closure, Introduction to Reset techniques, Clock Domain Crossing, Multiple Clock Domains

Integrated in the course

Course Project

• Design/Implementation